ARTICLE - JULY / AUGUST 2004

EUROPE APPLIES ITSELF TO THE FUTURE

The role of MEDEA+ in establishing a sound long-term vision for micro- and increasingly nano-electronics was highlighted by the launch of the MEDEA+ Applications Technology Roadmap (ATRM) late last year. This took a new approach to such foresight exercises by starting from the envisaged needs of the end user in 2012, and then identifying the enabling applications technologies needed for their timely realisation.

End-user requirements were determined from various existing sources ? including the International Technology Roadmap for Semiconductors (ITRS), the EUREKA Information Technology for European Advancement (ITEA) cluster and the European Commission IST Advisory Group (ISTAG) ? as well as by input from MEDEA+ partner companies, non-technical groups and other experts. This information was used to formulate a series of scenarios for 2012 and beyond.

Scope for future research and development was determined by the applications identified from these ATRM scenarios, most of which are already part of the MEDEA+ programme. These include anti-terrorism and security systems, improved energy management, contactless identification, flexible and scalable mobile telematics ? such as car-navigation, traffic-management and collision-warning systems ? and universal high speed wireless access to information, communications, entertainment and other centralised and local services.

Some applications also deal with new areas ? particularly in medical electronics for improved diagnostics and treatment ? that are currently not covered by MEDEA+.

Highly relevant applications

The relevance of MEDEA+ can be seen from the success of the first application projects finished in 2003. For example, the MEDEA+ A103 UniAccess project resulted in single-chip integrated access devices offering cost-effective Internet access over existing copper phone lines and a digital subscriber line (DSL) access multiplexer that handles the requirements of both voice and data traffic at the telephone exchange. These devices simplify connection and configurations for Internet-based communications by providing single access to all types of services ? from telephony, web browsing and email to broadcasting ? that currently require separate service-specific terrestrial or satellite networks.

And the MEDEA+ A106 INCA project has developed the basis for the next generation of DSL devices with technologies for 52 MB/s very high rate DSL (VDSL), enabling much faster access to Internet that will bring many new services and markets. INCA successfully promoted use of its discrete multi-tone (DMT) technology, which has now been adopted by the relevant ANSI and IEEE standards committees.

With the growing prevalence of wireless networks, the MEDEA+ A105 UniLAN project has developed chip architectures and radio frequency (RF) components to implement existing and future European-backed wireless standards. As a result, equipment for 3G mobile phone networks and company or domestic wireless local area data communications networks will become available to a wide range of users, benefiting European communications equipment manufacturers and consumer electronics suppliers.

Mass data storage is a critical strategic issue in the evolution of both consumer and professional microelectronics equipment. The MEDEA+ A202 FUST project focused on developing system-on-chip (SoC) devices for such applications. It resulted in new formats, common systems architectures and components for optical, magnetic and electronic storage media with applications from digital video recorders for the consumer market, through residential gateways for domestic computing and entertainment, to professional video camcorders with built-in DVD recording.

Speeding time to market

Time-to-market pressures continue to grow in the microelectronics sector, with market windows shrinking rapidly to as low as six months. The functionality of today's electronic devices ? from laptop computers and mobile phones to domestic multimedia and automotive equipment ? depends increasingly on complete system-on-chip (SoC) devices. And with new technologies allowing for example integration of up 20 million gates and 100 Mbit of SRAM on a single 1cm2 home gateway SoC, the demands on designers are heavy.

The challenge is to make the design cycle for these systems ever shorter to improve market position and meet customer expectations. One way to cut time-to-market is to reuse as much as possible of existing designs. However, design engineers need to be aware that suitable intellectual property (IP) exists, and it must be both in a format that can be incorporated painlessly into the design in progress, and that it will interface and function correctly with other parts of the design.

The MEDEA+ A511 ToolIP project therefore developed a set of tools that facilitates IP reuse and validation, and helps ensure first-time success on silicon. IP was considered in terms of its qualification ? embracing selection, evaluation, modification, validation and simulation. No new languages were required and there was no need for any large investment in capital and time. The resulting methodology provides the missing element in the existing SoC design chain.

ToolIP has also been active in the standardisation arena through involvement with the Virtual Socket Interface Alliance (VSIA) for the characterisation of IP reuse and interfaces, and with the Open SystemC Initiative (OSCI) ? the industry organisation backing SystemC as an open-source system-level chip design language. A major achievement was the SystemC 2.0 language for IP specification and reuse.